OpenRAM
OpenRAM is an award winning open-source Python framework to create the layout, netlists,
timing and power models, placement and routing models, and other views necessary to use
SRAMs in ASIC design.
github
Eren Dogan
PhD Student
Computer Science & Engineering
University of California, Santa Cruz
work@edogan.us
I am a third-year PhD student at UC Santa Cruz. I am interested in computer architecture, VLSI, EDA, and other related areas.
Research
2024
GAT-Steiner: Rectilinear Steiner Minimal Tree Prediction Using GNNs
Bugra Onal*, Eren Dogan*, Muhammad Hadir Khan, Matthew R. Guthaus
International Conference on Computer-Aided Design (ICCAD), 2024
acm
arXiv
scholar
2024
VLSI Hypergraph Partitioning with Deep Learning
Muhammad Hadir Khan, Bugra Onal, Eren Dogan, Matthew R. Guthaus
As Work-in-Progress at International Symposium on Machine Learning for CAD (MLCAD), 2024
arXiv
scholar
2022
Deep Compression for PyTorch Model Deployment on Microcontrollers
Eren Dogan, H. Fatih Ugurdag, Hasan Unlu
As Poster at International Conference on VLSI Design held jointly with International Conference
on Embedded Systems Design (VLSID), 2022
arXiv
scholar
github
2021
OpenCache: An Open-Source OpenRAM Based Cache Generator
Eren Dogan, H. Fatih Ugurdag, Matthew R. Guthaus
Workshop on Open-Source EDA Technology (WOSET), at International Conference on
Computer-Aided Design (ICCAD), 2021
pdf
scholar
github
Contributed Projects
vlsida-eda
vlsida-eda is the Anaconda channel for OpenRAM and other VLSIDA lab projects.
anaconda github
vlsida-eda is the Anaconda channel for OpenRAM and other VLSIDA lab projects.
anaconda github
Service
Reviewer at DAC 2025, MLCAD 2024, and VLSI-SoC 2024.
Personal
I am a German-Turk (Deutschtürke), born in Nordenham and raised in Mersin.